Low noise reference circuit
US11604487B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 12, 2021 |
| Grant date | Mar 14, 2023 |
| Priority date | — |
| Expiry date | Nov 12, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/26
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
Reference circuits are described. In particular reference circuits that use a plurality of cascaded proportional to absolute temperature, PTAT, cells are described. In the circuits disclosed, currents of the low current density arm of first PTAT cell are mirrored into the high current density arms of a second PTAT cell such that any deviation of current in the low current density arm of the first cell will be replicated as the current in the high current density arm of the second cell. In this way low noise circuits can be provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.