Dual-modal memory interface controller
US11604744B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 16, 2020 |
| Grant date | Mar 14, 2023 |
| Priority date | — |
| Expiry date | Feb 10, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/382
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A dual-model memory interface of a computing system is provided, configurable to present memory interfaces having differently-graded bandwidth capacity to different processors of the computing system. A mode switch controller of the memory interface controller, based on at least an arbitration rule written to a configuration register, switches the memory interface controller between a narrow-band mode and a wide-band mode. In each mode, the memory interface controller disables either a plurality of narrow-band memory interfaces of the memory interface controller according to a first bus standard, or a wide-band memory interface of the memory interface controller according to a second bus standard. The memory interface controller virtualizes a plurality of system memory units of the computing system as a virtual wide-band memory unit according to the second bus standard, or virtualizes a system memory unit of the computing system as a virtual narrow-band memory unit according to the first bus standard.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.