Ternary mode of planar engine for neural processor
US11604975B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 9, 2020 |
| Grant date | Mar 14, 2023 |
| Priority date | — |
| Expiry date | Jun 5, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2207/4824
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A neural processor includes one or more neural engine circuits and a planar engine circuit. The neural engine circuits can perform convolution operations of first input data with one or more kernels to generate a first output. The planar engine circuit receives second input data that corresponds to a version of the first input data. The planar engine circuit also receives third input data that includes fourth input data and fifth input data stored together in a dimension of third input data. The planar engine circuit performs a first elementwise operation between a version of the second input data and a version of the fourth input data to generate intermediate data. The planar engine circuit performs a second elementwise operation between the intermediate data and a version of the fifth input data to generate a second output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.