Power circuit that interrupts supply of power to a volatile memory in response to a signal indicating a malfunction of a processor
US11605404B2 · kind B2 · utility
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6References
11Claims
0Family size
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Key dates
| Filing date | Apr 3, 2020 |
| Grant date | Mar 14, 2023 |
| Priority date | — |
| Expiry date | Aug 4, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present description relates to a method and a circuit for powering a volatile memory in which power pulses are sent to the memory, the duration between two pulses being shorter than a remanence time of said volatile memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.