Patent · US Active

Package comprising a substrate, an integrated device, and an encapsulation layer with undercut

US11605571B2 · kind B2 · utility

2Cited by

11References

33Claims

0Family size

Assignee

QUALCOMM Incorporated · US

Inventors

Alberto Jose Teixeira De Queiros · Munich, DE
Andreas Franz · Ludwigsburg, DE
Anna Katharina KREFFT · Munich, DE
Claus Reitlinger · Wolnzach, DE

Key dates

Filing date	Oct 8, 2020
Grant date	Mar 14, 2023
Priority date	—
Expiry date	Dec 1, 2040

Classification

Technology area (CPC H)Electricity
CPC primaryH03H9/64
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A package that includes a substrate, an integrated device, a first encapsulation layer and a void. The substrate includes a first surface. The integrated device is coupled to the first surface of the substrate. The first encapsulation layer is located over the first surface of the substrate and the integrated device. The first encapsulation layer includes an undercut relative to a side surface of the integrated device. The void is located between the integrated device and the first surface of the substrate. The void is laterally surrounded by the undercut of the encapsulation layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.