Semiconductor structure and method for forming the same
US11605726B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Apr 9, 2021 |
| Grant date | Mar 14, 2023 |
| Priority date | — |
| Expiry date | Jun 17, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0156
Abstract
A semiconductor structure and a method for forming the same are provided. In one form, a forming method includes: providing a base, a gate structure, a source-drain doping region, and an interlayer dielectric layer; removing the gate structure located in an isolation region to form an isolation opening and expose the top and side walls of a fin located in the isolation region; performing first ion-doping on the fin under the isolation opening to form an isolation doped region, a doping type of the isolation doped region being different from a doping type of the source-drain doping region; and filling the isolation opening with an isolation structure after the doping, the isolation structure straddling the fin of the isolation region. In embodiments and implementations of the present disclosure, the isolation doped region is formed, a doping concentration of inversion ions in the fin of the isolation region can thus be increased, and a barrier of a P-N junction formed by the source-drain doping region and the fin of the isolation region can be increased accordingly, to prevent the device from generating a conduction current in the fin of the isolation region during operation, thereb…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.