Patent · US Active

Method of verifying integrity of a pair of cryptographic keys and cryptographic device

US11606195B2 · kind B2 · utility

0Cited by
3References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 5, 2019
Grant dateMar 14, 2023
Priority date
Expiry dateAug 24, 2040

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L9/30
  • WIPO fieldDigital communication
  • WIPO sectorElectrical engineering

Abstract

Disclosed is a method of verifying integrity of a pair of public and private cryptographic keys within the additive group of the integers modulo N, with N being the product of two primary numbers p and q, the method including: calculating a candidate private exponent d′ corresponding to a private exponent d of the private key; and executing a test of integrity. The test of integrity includes a step for verifying the coherence of the candidate private exponent d′ with respect to a public exponent e of the public key and to the numbers p and q, the verification step involving a first multiple modulo of the public exponent e of the public key and a second multiple modulo of the public exponent e of the public key.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.