Hierarchical register file device based on spin transfer torque-random access memory
US11609786B2 · kind B2 · utility
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11Claims
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Key dates
| Filing date | Feb 5, 2020 |
| Grant date | Mar 21, 2023 |
| Priority date | — |
| Expiry date | Aug 7, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M7/6047
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The embodiments provide a register file device which increases energy efficiency using a spin transfer torque-random access memory for a register file used to compute a general purpose graphic processing device, and hierarchically uses a register cache and a buffer together with the spin transfer torque-random access memory, to minimize leakage current, reduce a write operation power, and solve the write delay.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.