Programmed input/output message control circuit
US11609878B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 13, 2021 |
| Grant date | Mar 21, 2023 |
| Priority date | — |
| Expiry date | May 13, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/7807
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In an embodiment, a system on a chip (SOC) comprises a semiconductor die on which circuitry is formed, wherein the circuitry comprises a memory controller circuit and a plurality of networks formed from a plurality of individual network component circuits. The memory controller includes a PIO message control circuit that is configured to receive PIO messages addressed to individual network component circuits and determine whether to send the PIO messages to the individual network component circuits based on determine whether previous PIO messages are pending for the individual network component circuits. The PIO message control circuit is configured to delay a first PIO message at the PIO message control circuit in response to determining that previous PIO message is pending for the addressee of the first PIO message.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.