Data volume sculptor for deep learning acceleration
US11610362B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 5, 2021 |
| Grant date | Mar 21, 2023 |
| Priority date | — |
| Expiry date | Sep 14, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06V10/759
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A device include on-board memory, an applications processor, a digital signal processor (DSP) cluster, a configurable accelerator framework (CAF), and at least one communication bus architecture. The communication bus communicatively couples the applications processor, the DSP cluster, and the CAF to the on-board memory. The CAF includes a reconfigurable stream switch and data volume sculpting circuitry, which has an input and an output coupled to the reconfigurable stream switch. The data volume sculpting circuitry receives a series of frames, each frame formed as a two dimensional (2D) data structure, and determines a first dimension and a second dimension of each frame of the series of frames. Based on the first and second dimensions, the data volume sculpting circuitry determines for each frame a position and a size of a region-of-interest to be extracted from the respective frame, and extracts from each frame, data in the frame that is within the region-of-interest.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.