Multilayer capacitor
US11610733B2 · kind B2 · utility
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Key dates
| Filing date | Apr 7, 2021 |
| Grant date | Mar 21, 2023 |
| Priority date | — |
| Expiry date | Apr 7, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01G4/30
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A multilayer capacitor includes a body including a multilayer structure in which a plurality of dielectric layers are stacked and a plurality of internal electrodes stacked with the dielectric layer interposed therebetween and external electrodes disposed on an exterior of the body and connected to the internal electrodes. At least one of the plurality of dielectric layers includes a plurality of grains, and a ratio of grains having dislocations, among the plurality of grains, is 20% or greater.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.