Chip having a flexible substrate
US11610921B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2020 |
| Grant date | Mar 21, 2023 |
| Priority date | — |
| Expiry date | Oct 11, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/411
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A chip is provided. The chip includes a flexible substrate, a plurality of thin-film transistors, a redistribution layer, a first power rail layer, and a second power rail layer. The plurality of thin-film transistors are disposed on the flexible substrate. The redistribution layer is disposed above the plurality of thin-film transistors. The first power rail layer is disposed above the redistribution layer. The first power rail layer provides a first voltage to the plurality of thin-film transistors. The second power rail layer is disposed above the first power rail layer. The second power rail layer provides a second voltage to the plurality of thin-film transistors, wherein the second power rail layer is disposed in a grid shape.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.