Method and circuit for monitoring and controlling duty margin of a signal
US11611334B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 18, 2021 |
| Grant date | Mar 21, 2023 |
| Priority date | — |
| Expiry date | Oct 18, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/25
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A duty margin monitoring circuit, coupled to a functional circuit which generates a first output signal in response to a target signal, includes a modulation circuit, a replica circuit and an error detection circuit. The modulation circuit is arranged to receive the target signal and modulate the target signal to generate a modulated target signal. The replica circuit is arranged to receive the modulated target signal and generate a second output signal in response to the modulated target signal. The error detection circuit is coupled to the functional circuit and the replica circuit to receive the first output signal and the second output signal and arranged to generate an error detection result according to the first output signal and the second output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.