Memory device performing refresh operation based on a random value and method of operating the same
US11615829B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 29, 2021 |
| Grant date | Mar 28, 2023 |
| Priority date | — |
| Expiry date | Apr 29, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4087
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device includes a memory cell array, a random bit generator, a comparator and a refresh controller. The memory cell array includes a plurality of memory cells coupled to a plurality of word-lines. The random bit generator generates a random binary code having a predetermined number of bits. The comparator compares the random binary code and a reference binary code to output a matching signal based on a result of the comparison. The refresh controller refreshes target memory cells from among the plurality of memory cells based on addresses accessed by a memory controller during a sampling period randomly determined based on the matching signal and a refresh command from the memory controller.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.