Semiconductor assembly
US11616019B2 · kind B2 · utility
0Cited by
11References
28Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2020 |
| Grant date | Mar 28, 2023 |
| Priority date | — |
| Expiry date | Jul 16, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K3/3436
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor assembly is described that includes a substrate having top and bottom sides. An integrated circuit die coupled to the substrate includes first and second distinct sets of ground pads. In some embodiments, the first and second sets of ground pads are configured to have distinct ground return paths to a host system. In further embodiments, one of the ground return paths may include a metal plate coupled between ground contacts on the top side of the substrate and ground contacts on a printed circuit board of the host system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.