Methods for making three-dimensional module
US11616030B2 · kind B2 · utility
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35References
10Claims
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Key dates
| Filing date | Nov 30, 2021 |
| Grant date | Mar 28, 2023 |
| Priority date | — |
| Expiry date | Nov 30, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/68372
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for making a three-dimensional (3-D) module includes the steps of: A) forming a laminate of alternate ceramic tape layers and internal electrode layers on a substrate; B) etching said laminate to form first and second capacitor stacks at said first and second locations; C) firing said first and second capacitor stacks integrally; D) forming first and second pairs of external electrodes on said first and second capacitor stacks, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.