Controlled slew rate current limited ramp down voltage control
US11616438B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2019 |
| Grant date | Mar 28, 2023 |
| Priority date | — |
| Expiry date | Mar 4, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/1582
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A power circuit includes a switch circuit, an auxiliary load circuit coupled to an output terminal, a switching control circuit to operate the switch circuit responsive to an error signal, a regulator circuit having a sense resistor, a comparator to provide the error signal, and a DAC to control a sense current of the sense resistor. A DAC control circuit provides a DAC input signal having a controlled ramp rate responsive to a decreasing setpoint signal, a load control circuit selectively enables the auxiliary load circuit responsive to the decreasing setpoint signal and responsive to the error signal to control the power circuit slew rate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.