Serial time triggered data bus
US11616660B2 · kind B2 · utility
1Cited by
10References
13Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 27, 2021 |
| Grant date | Mar 28, 2023 |
| Priority date | — |
| Expiry date | Oct 27, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L12/4015
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A serial communications bus system comprising a plurality of end users arranged to transmit data on a common data bus, each end user provided with a bus arbiter, physically separate from the respective end user, configured to define, for that end user, a cycle of transmission enable intervals whereby the end user may transmit data on the data bus and transmission disable intervals whereby the end user may not transmit data on the data bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.