Configuration of secondary processors
US11620120B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 27, 2021 |
| Grant date | Apr 4, 2023 |
| Priority date | — |
| Expiry date | Oct 8, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/063
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods are provided for configuration of a secondary processor by a host processor. The host processor can access compiled firmware for the secondary processor, which has a parameter stored at a pre-determined address. The host processor can modify the parameter at the pre-determined address in the firmware to generate a modified firmware for the secondary processor. The host processor can further load the modified firmware into a memory of the secondary processor. The secondary processor can execute the modified firmware having the modified parameter. The host processor can further remodify the parameter in the memory of the secondary processor during runtime without having to recompile the firmware.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.