System and method applied with computing-in-memory
US11621040B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 1, 2021 |
| Grant date | Apr 4, 2023 |
| Priority date | — |
| Expiry date | Oct 1, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2013/0054
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system includes a global generator and local generators. The global generator is coupled to a memory array, and is configured to generate global signals, according to a number of a computational output of the memory array. The local generators are coupled to the global generator and the memory array, and are configured to generate local signals, according to the global signals. Each one of the local generators includes a first reference circuit and a local current mirror. The first reference circuit is coupled to the global generator, and is configured to generate a first reference signal at a node, in response to a first global signal of the global signals. The local current mirror is coupled to the first reference circuit at the node, and is configured to generate the local signals, by mirroring a summation of at least one signal at the node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.