Bipolar-transistor device and corresponding fabrication process
US11621324B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 18, 2021 |
| Grant date | Apr 4, 2023 |
| Priority date | — |
| Expiry date | May 18, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/26586
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A bipolar junction transistor includes an extrinsic collector region buried in a semiconductor substrate under an intrinsic collector region. Carbon-containing passivating regions are provided to delimit the intrinsic collector region. An insulating layer on the intrinsic collector region includes an opening within which an extrinsic base region is provided. A semiconductor layer overlies the insulating layer, is in contact with the extrinsic base region, and includes an opening with insulated sidewalls. The collector region of the transistor is provided between the insulated sidewalls.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.