Low area and high speed termination detection circuit with voltage clamping
US11621711B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 13, 2021 |
| Grant date | Apr 4, 2023 |
| Priority date | — |
| Expiry date | Jul 13, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0013
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Methods, apparatus, systems, and articles of manufacture corresponding to a low area and high speed termination detection circuit with voltage clamping are disclosed. An example apparatus includes a transistor including a first control terminal, first current terminal and a second current terminal, the second current terminal adapted to be coupled to a load. The apparatus further includes a logic gate including an input coupled to the first current terminal. The apparatus further includes a current source including a second control terminal, a third current terminal coupled to a voltage rail and a fourth current terminal coupled to the first current terminal and the input of the logic gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.