Device and method for checking register data
US11630600B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 31, 2020 |
| Grant date | Apr 18, 2023 |
| Priority date | — |
| Expiry date | Dec 31, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F21/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is a register data checking device including: an original parity-bit generator generating an original parity bit according to register data to be inputted into a register, and then writing the original parity bit to the register; and a detecting circuit. The detecting circuit includes: a scanning circuit reading the register data and the original parity-bit from the register; an arbitrator enabling the scanning circuit when an access status of the register is free, and thereby forwarding the register data and the original parity bit from the scanning circuit; at least one controlled parity-bit generator generating a controlled parity bit according to the register data from the arbitrator when the access status of the register is free; and at least one parity-bit checking circuit comparing the original parity bit from the arbitrator with the controlled parity bit when the access status is free, and thereby outputting a check result.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.