Pixel arrangement of display device and tiled display including the same
US11630632B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 4, 2021 |
| Grant date | Apr 18, 2023 |
| Priority date | — |
| Expiry date | Nov 4, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/353
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A display device includes a tiled display structure including a first display panel, a second display panel adjacent to a first side of the first display panel, a third display panel adjacent to a second side of the first display panel, and a fourth display panel adjacent to a first side of the third display panel and a first side of the second display panel. Each of the first to fourth display panels includes a display area and a pad area, and each of the first to fourth display panels includes a plurality of pixels in the display area. Each of the pixels includes at least two sub-pixels. When viewed in a plan view of the tiled display structure, the at least two sub-pixels included in each of the pixels are repeatedly arranged in a row direction and a column direction on a plane of the tiled display structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.