Flash translation layer design using reinforcement learning
US11630765B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 14, 2020 |
| Grant date | Apr 18, 2023 |
| Priority date | — |
| Expiry date | Dec 31, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/045
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The subject matter described herein provides systems and techniques to counter a high write amplification in physical memory, to ensure the longevity of the physical memory, and to ensure that the physical memory wears in a more uniform manner. In this regard, aspects of this disclosure include the design of a Flash Translation Layer (FTL), which may manage logical to physical mapping of data within the physical memory. In particular, the FTL may be designed with a mapping algorithm, which uses reinforcement learning (RL) to optimize data mapping within the physical memory. The RL technique may use a Bellman equation with q-learning that may rely on a table being updated with entries that take into account at least one of a state, an action, a reward, or a policy. The RL technique may also make use a deep neural network to predict particular values of the table.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.