Semiconductor device
US11631670B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 25, 2021 |
| Grant date | Apr 18, 2023 |
| Priority date | — |
| Expiry date | Oct 25, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/853
Abstract
A semiconductor device including a substrate; a first active pattern on the substrate and extending in a first direction, an upper portion of the first active pattern including a first channel pattern; first source/drain patterns in recesses in an upper portion of the first channel pattern; and a gate electrode on the first active pattern and extending in a second direction crossing the first direction, the gate electrode being on a top surface and on a side surface of the at least one first channel pattern, wherein each of the first source/drain patterns includes a first, second, and third semiconductor layer, which are sequentially provided in the recesses, each of the first channel pattern and the third semiconductor layers includes silicon-germanium (SiGe), and the first semiconductor layer has a germanium concentration higher than those of the first channel pattern and the second semiconductor layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.