Method for electrochemically etching a semiconductor structure
US11631782B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 25, 2019 |
| Grant date | Apr 18, 2023 |
| Priority date | — |
| Expiry date | Jan 25, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/825
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method for etching a semiconductor structure (110) is provided, the semiconductor structure comprising a sub-surface quantum structure (30) of a first III-V semiconductor material,beneath a surface layer (31) of a second III-V semiconductor material having a charge carrier density of less than 5×1017 cm−3. The sub-surface quantum structure may comprise, for example, a quantum well, or a quantum wire, or a quantum dot. The method comprises the steps of exposing the surface layer to an electrolyte (130), and applying a potential difference between the first III-V semiconductor material and the electrolyte, to electrochemically etch the sub-surface quantum structure (30) to form a plurality of nanostructures, while the surface layer (31) is not etched. A semiconductor structure, uses thereof, and devices incorporating such semiconductor structures are further provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.