Operational amplifier
US11632091B2 · kind B2 · utility
0Cited by
2References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 12, 2021 |
| Grant date | Apr 18, 2023 |
| Priority date | — |
| Expiry date | Aug 12, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45482
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A differential pair for an input stage includes two identical branches in parallel, each branch including a first MOS transistor and a second MOS transistor arranged in series, wherein the first transistor and the second transistor have a channel of the same type, and wherein each of the first transistor and the second transistor has a gate coupled to the same corresponding input of the differential pair and a circuit configured to apply to each of the first transistors a potential difference between a source and a channel-forming region of the first transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.