Stable low-power analog-to-digital converter (ADC) reference voltage
US11632122B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 8, 2021 |
| Grant date | Apr 18, 2023 |
| Priority date | — |
| Expiry date | Jun 8, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/1215
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A conversion circuit that performs analog-to-digital conversion is described. During operation, the conversion circuit receives an input signal. Then, the conversion circuit performs analog-to-digital conversion and provides a quantized output corresponding to the input signal based at least in part on a first power-supply voltage and a second power-supply voltage of the conversion circuit. For example, the quantized output may be based at least in part on a comparison of the input signal to the first power-supply voltage and the second power-supply voltage. Moreover, the first power-supply voltage and the second power-supply voltage may specify a full-scale range of the conversion circuit. When the full-scale range exceeds a second full-scale range associated with reference voltages that are other than the first power-supply voltage and the second power-supply voltage, the quantized output may correspond to a larger number of bits than when the full-scale range equals the second full-scale range.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.