Non-volatile memory express (NVMe) data processing method and system
US11636052B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 11, 2021 |
| Grant date | Apr 25, 2023 |
| Priority date | — |
| Expiry date | Oct 11, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4221
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing method and system, where the method includes: receiving, by a non-volatile memory express (NVMe) controller, a first Peripheral Component Interconnect express (PCIe) packet sent by a host, where a memory in the NVMe controller is provided with at least one input/output (I/O) submission queue, and the first PCIe packet includes entrance information of a target I/O submission queue and at least one submission queue entry (SQE); and storing the at least one SQE in the target I/O submission queue based on the entrance information of the target I/O submission queue. Therefore, an NVMe data processing process is simplified and less time-consuming, and data processing efficiency is improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.