Manufacturing method of multilayer ceramic electronic component
US11636983B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 22, 2022 |
| Grant date | Apr 25, 2023 |
| Priority date | — |
| Expiry date | Apr 22, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01G4/1227
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
The multilayer ceramic electronic component includes a ceramic body including a dielectric layer; and first and second internal electrodes disposed inside the ceramic body, and disposed to oppose each other with the dielectric layer interposed therebetween. When an average thickness of the dielectric layer is referred to as td and a standard deviation of a thickness of the dielectric layer in each position is referred to as σtd, while an average thickness of the first and second internal electrodes is referred to as to and a standard deviation of a thickness of a pre-determined region of any layer of the internal electrodes in each position is referred to as σte, a ratio (σte/σtd) of the standard deviation of the internal electrodes in each position to the standard deviation of the thickness of the dielectric layer in each position satisfies 1.10≤σte/σtd≤1.35.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.