Semiconductor package and method of manufacturing the same
US11637072B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2021 |
| Grant date | Apr 25, 2023 |
| Priority date | — |
| Expiry date | Mar 16, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/16195
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a substrate, a semiconductor die, a ring structure and a lid. The semiconductor die is disposed on the substrate. The ring structure is disposed on the substrate and surrounds the semiconductor die, where a first side of the semiconductor die is distant from an inner sidewall of the ring structure by a first gap, and a second side of the semiconductor die is distant from the inner sidewall of the ring structure by a second gap. The first side is opposite to the second side, and the first gap is less than the second gap. The lid is disposed on the ring structure and has a recess formed therein, and the recess overlaps with the first gap in a stacking direction of the ring structure and the lid.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.