Semiconductor device having selection line stud connected to string selection line
US11637117B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 25, 2020 |
| Grant date | Apr 25, 2023 |
| Priority date | — |
| Expiry date | Jan 4, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/40
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes; a memory stack disposed on a substrate and including a lower gate electrode, an upper gate stack including a string selection line, a vertically extending memory gate contact disposed on the lower gate electrode, and a vertically extending selection line stud disposed on the string selection line. The string selection line includes a material different from that of the lower gate electrode, and the selection line stud includes a material different from that of the memory gate contact.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.