Array substrate, manufacturing method thereof, and display apparatus
US11637166B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 13, 2019 |
| Grant date | Apr 25, 2023 |
| Priority date | — |
| Expiry date | Feb 27, 2041 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02E10/549
Abstract
The present disclosure relates to a method of manufacturing an array substrate. The method of manufacturing an array substrate may include forming a main via hole in a substrate, filling a first conductive material in the main via hole, and forming a pixel circuit layer on a first surface of the substrate. The pixel circuit layer may include a first via hole. An orthographic projection of the first via hole on the substrate may at least partially overlap the corresponding main via hole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.