Voltage tolerant oscillator with enhanced RF immunity performance
US11637529B2 · kind B2 · utility
0Cited by
6References
15Claims
0Family size
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Key dates
| Filing date | Oct 6, 2021 |
| Grant date | Apr 25, 2023 |
| Priority date | — |
| Expiry date | Oct 6, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H2007/013
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated circuit includes an inverter, first and second capacitors, a resistor, and a transistor. The inverter has an input and an output. The first capacitor is coupled to a ground. The transistor has a first transistor terminal, a second transistor terminal, and a control input. The first transistor terminal is coupled to the first capacitor and the second transistor terminal is coupled to the input of the inverter. The second capacitor is coupled between the output of the inverter and the ground. The resistor is coupled between the output of the inverter and the first transistor terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.