Idle-power mitigation circuit
US11640252B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 18, 2021 |
| Grant date | May 2, 2023 |
| Priority date | — |
| Expiry date | Jun 18, 2041 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data storage device includes a memory device, an internal power supply, and a controller. When the data storage device is in an idle power state, the controller is configured to electrically isolate the data storage device from an external power source and draw power from the internal power supply to perform data storage operations. The power utilized for the data storage operations while the data storage device is in the idle power state may be exclusively from the internal power supply or a mixture of the internal power supply and the external power supply. The total power utilized during the idle power state is less than a threshold that is relative to the active power of the data storage device or at a fixed value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.