GOA circuit
US11640778B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 27, 2020 |
| Grant date | May 2, 2023 |
| Priority date | — |
| Expiry date | Oct 29, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/043
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A gate driver on array (GOA) circuit includes a plurality of GOA units, wherein the GOA units are cascaded. The cascaded GOA units includes an Nth-stage GOA unit including a pull-up control module, a cascade module, a pull-down holding module, a pull-down control module, and a signal output module. A structure of an inverter module in the pull-down holding module is improved. Advantageous effects are as follows. The inverter module in the pull-down holding module is optimized. Difference in a voltage-ampere characteristic between each of transistors after long-term operation of the inverter module is effectively reduced, thereby increasing operating time of the inverter module.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.