Patent · US Active

Fast lock phase-locked loop circuit for avoiding cycle slip

US11641207B2 · kind B2 · utility

2Cited by
7References
2Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 10, 2022
Grant dateMay 2, 2023
Priority date
Expiry dateFeb 10, 2042

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03L7/101
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

Disclosed is a fast lock phase-locked loop circuit for avoiding cycle slip, which belongs to the technical field of integrated circuits. The fast lock phase-locked loop circuit includes a phase frequency detector, a charge pump, an intermediate stage circuit, a loop filter, a voltage-controlled oscillator and a frequency divider. The phase frequency detector, the charge pump, the intermediate stage circuit, the loop filter and the voltage-controlled oscillator are connected in sequence; an output OUT end of the voltage-controlled oscillator is connected with an input IN end of frequency divider, and an output OUT end of the frequency divider is connected with an input IN end of the phase frequency detector to form a feedback path. The output clock frequency of the VCO and the expected frequency, i.e., the reference clock frequency and the feedback clock frequency, are prevented from being too close when the loop is started.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.