Conductive PVD stack-up design to improve reliability of deposited electrodes
US11641724B2 · kind B2 · utility
0Cited by
4References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Jan 27, 2022 |
| Grant date | May 2, 2023 |
| Priority date | — |
| Expiry date | Jan 27, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K5/03
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An electronic device can include a housing component that can define an interior surface and an exterior surface of the device, a metallic film deposited on the interior surface and extending at least partially onto the exterior surface, and a ceramic film deposited on the exterior surface and at least partially over a portion of the metallic film on the exterior surface. The ceramic film can be in electrical communication with a portion of the metallic film deposited on the interior surface to form an electrical pathway from the exterior surface to the interior surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.