Gate driver and display panel including the same
US11645981B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 7, 2022 |
| Grant date | May 9, 2023 |
| Priority date | — |
| Expiry date | Jul 7, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0673
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Disclosed are a gate driver and a display panel including the same. The gate driver according to an embodiment includes a plurality of signal transfer units cascade-connected via a carry line to which a carry signal is applied from a previous signal transfer unit, and an nth (n is a positive integer) signal transfer unit includes a first output unit configured to output a first gate signal to a first output node according to a voltage of a first control node configured to pull up an output voltage and a second control node configured to pull down the output voltage; and a second output unit configured to output a second gate signal in which a phase of the first gate signal is reversed to a second output node, wherein the second output unit may include a first pull-up transistor configured to output a high potential voltage to the second output node according to a voltage of a second control node of an (n-i)th (i is a positive integer less than n) signal transfer unit; and a second pull-down transistor configured to output a first low potential voltage to the second output node according to a voltage of a first control node of an (n+j)th (j is a natural number greater than n) signal…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.