Pixel structure, array substrate and display panel
US11646325B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 19, 2021 |
| Grant date | May 9, 2023 |
| Priority date | — |
| Expiry date | Jun 18, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2300/0465
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure discloses a pixel structure, an array substrate and a display panel. The pixel structure includes a first data line; a first gate line and a second gate line; a first pixel unit and a second pixel unit. The first pixel units and second pixel units arranged along a second direction; a first pixel electrode relative to the second pixel electrode is close to the first data line, a first thin film transistor and second thin film transistors are arranged close to the first data line; first connecting trace is set between the first drain electrode and the first pixel electrode, a second connecting trace is set between the second drain electrode and the second pixel electrode to make a capacitance of the first pixel unit matching with a capacitance of the second pixel unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.