Memory package, storage device including memory package, and storage device operating method
US11651805B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 29, 2021 |
| Grant date | May 16, 2023 |
| Priority date | — |
| Expiry date | Jul 13, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory package includes; a first memory chip including first memory pads, and a buffer chip including first buffer pads respectively connected with the first memory pads and second buffer pads connected with an external device. The buffer chip respectively communicates signals received via the second buffer pads to the first buffer pads in response to a swap enable signal having a disabled state, and the buffer chip swaps signals received via the second buffer pads to generate first swapped signals, and respectively communicates the first swapped signals to the first buffer pads in response to the swap enable signal having an enabled state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.