Voltage tracking circuits and electronic circuits
US11652477B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 24, 2021 |
| Grant date | May 16, 2023 |
| Priority date | — |
| Expiry date | Jun 24, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/811
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A voltage tracking circuit is provided and includes first and second P-type transistors and a voltage reducing circuit. The drain of the first P-type transistor is coupled to a first voltage terminal. The voltage reducing circuit is coupled between the first voltage terminal and the gate of the first P-type transistor. The voltage reducing circuit reduces a first voltage at the first voltage terminal by a modulation voltage to generate a control voltage and provides the control voltage to the gate of the first P-type transistor. The gate of the second P-type transistor is coupled to the first voltage terminal, and the drain thereof is coupled to a second voltage terminal. The source of the first P-type transistor and the source of the second P-type transistor are coupled to the output terminal of the voltage tracking circuit. The output voltage is generated at the output terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.