OLED display panel having barrier control line
US11653518B2 · kind B2 · utility
0Cited by
0References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 30, 2020 |
| Grant date | May 16, 2023 |
| Priority date | — |
| Expiry date | Apr 1, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K2102/341
Abstract
A display panel includes: a substrate; a first electrode layer disposed on one side of the substrate; a pixel definition layer with a plurality of opening structures disposed on one side of the first electrode layer facing away from the substrate, where the opening structure exposes part of first electrodes. The barrier control gate is then disposed on the pixel definition layer. The first-type carrier layer, then is the light-emitting layer, the second-type carrier layer, and finally the second electrode layer, are sequentially deposit on the display panel as formed above.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.