High-speed signal subsystem testing system

US11656264B2 · kind B2 · utility

Assignee

• Dell Products L.P. · US

Inventors

• Umesh Chandra · Sunnyvale, US
• Bhyrav M. Mutnury · Austin, US

Key dates

• Filing date: Jul 13, 2021
• Grant date: May 23, 2023
• Expiry date: Jul 13, 2041

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/31716
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

A high-speed signal subsystem testing system includes a processing system having a transmitter and a receiver, a loop back subsystem coupled to the transmitter and receiver to provide a testing communication path between the transmitter and the receiver, and a communication path testing engine coupled to the transmitter and the receiver. The communication path testing engine generates test signal(s) and transmits the test signal(s) via the transmitter and through the testing communication path provided by the loop back subsystem and, in response, receives test signal result(s) via the receiver and through the testing communication path provided by the loop back subsystem, The communication path testing engine processes the test signal result(s) to generate a testing impedance profile for the testing communication path, and compares the testing impedance profile to an expected impedance profile to determine whether a testing communication path issue exists in the testing communication path.