Memory module and operating method
US11656929B2 · kind B2 · utility
0Cited by
8References
18Claims
0Family size
Assignee
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Key dates
| Filing date | Jun 11, 2021 |
| Grant date | May 23, 2023 |
| Priority date | — |
| Expiry date | Jun 11, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/0793
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory module includes; dynamic random access memories (DRAMs), a controller configured to control operation of the DRAMs, and an active device configured, in response to detection of an error occurring in at least one of the DRAMs, to generate an interrupt and store error information corresponding to the error.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.