Incremental generation of quantum circuits
US11657196B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 24, 2021 |
| Grant date | May 23, 2023 |
| Priority date | — |
| Expiry date | Sep 25, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N10/80
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method includes detecting submission of a first quantum circuit for compilation, the first quantum circuit comprising a first set of quantum logic gates; generating a first gate index, the first gate index comprising an ordered table of a subset of the set of quantum logic gates, each quantum logic gate of the subset of quantum logic gates including a corresponding set of qubits acted on by the quantum logic gate; comparing the first gate index with a second gate index to determine a structural equality of the first quantum circuit and the second quantum circuit; and parameterizing, in response to determining a structural equality of the first quantum circuit and the second quantum circuit, a first set of parameters of a second set of quantum logic gates of the second quantum circuit with a second set of parameters of the first set of quantum logic gates.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.