Power electronics assembly having a gate drive device disposed between a plurality of transistors
US11659697B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 29, 2020 |
| Grant date | May 23, 2023 |
| Priority date | — |
| Expiry date | Apr 9, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M7/5387
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods, apparatuses and systems to provide for technology to that includes a plurality of transistors including first transistors and second transistors. The first transistors are disposed opposite the second transistors in a lateral direction with a first space between the first transistors and the second transistors in the lateral direction. A gate driver is electrically connected to the plurality of transistors to operate the plurality of transistors. The gate driver has a first portion disposed between the first transistors and the second transistors in the first space.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.