Lithography method using multiscale simulation, and method of manufacturing semiconductor device and exposure equipment based on the lithography method
US11662665B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Feb 16, 2022 |
| Grant date | May 30, 2023 |
| Priority date | — |
| Expiry date | Feb 16, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/20
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A lithography method using a multiscale simulation includes estimating a shape of a virtual resist pattern for a selected resist based on a multiscale simulation; forming a test resist pattern by performing an exposure process on a layer formed of the selected resist; determining whether an error range between the test resist pattern and the virtual resist pattern is in an allowable range; and forming a resist pattern on a patterning object using the selected resist when the error range is in the allowable range. The multiscale simulation may use molecular scale simulation, quantum scale simulation, and a continuum scale simulation, and may model a unit lattice cell of the resist by mixing polymer chains, a photo-acid generator (PAG), and a quencher.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.