System and method for securely debugging across multiple execution contexts
US11663010B2 · kind B2 · utility
0Cited by
4References
18Claims
0Family size
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Key dates
| Filing date | Mar 8, 2021 |
| Grant date | May 30, 2023 |
| Priority date | — |
| Expiry date | Mar 8, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for a virtual processor base/virtual execution context arrangement. The disclosed arrangement utilizes chiplets comprising core logic and defined instruction sets. The chiplets are adapted to operate in conjunction with one or more active execution contexts to enable the execution of particular processes. In particular, the defined instruction sets includes a instructions for processor debugging. The system and method support the compartmentalization of such debugging instructions so as to provide enhanced processor and process security.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.